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integrated Ethernet Switch (iES-6), is a rugged 6 port layer 2 managed gigabit Ethernet switch for airborne, shipboard or mobile ground vehicles. 

Features

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(iES-6 is developed and manufactured by Telspan Data. We are their official International reseller.)

Switch Capabilities Overview

  • (6) 10/100/1000 Speed Ports
  • 1-4 PTP Ordinary/Transparent/Boundary Clocks
  • 8K MAC Address
  • 4K VLAN’s (IEEE 802.1Q)
  • VLAN Q-in-Q (IEEE 802.1ad) (Carrier Ethernet)
  • 8K L2 Multicast Group Addresses
  • 8K IPv4/IPv6 Multicast Groups
  • MLDv1 & MLDv2 w/Source Forwarding
  • 8 Priorities & 8 QoS Queues per Port
  • Jumbo Frames up to 9.6KB
  • Programmable MTU Per Port
  • Port Mirroring & Link Aggregation (IEEE 802.3ad)
  • Rapid Spanning Tree Protocol (IEEE 802.1w)
  • Multiple Spanning Tree Protocol (IEEE 802.1s)
  • Full-Duplex Flow Control (IEEE 802.3X)
  • Packet Filtering Engine w/up to 256 Entries
  • Port Ingress Policing w/Flow Control
  • Flood Controllers (Broadcast/Multicast/Unicast)
  • Port/MAC-Based Access Control (IEEE 802.1X)
  • Time Sync’ed Audio/Video Bridging (AVB)
  • Integrated Cable Diagnostics
  • CLI, Web GUI & SNMP Confi gure & Monitoring

Open/GND Discrete Outputs

  • 6 Port Activity
  • 1 IEEE-1588 Lock Status
  • 1 Fault

Open/GND Discrete Inputs

  • 1 Reset

IRIG-A/B/G Time

  • 3 DC Code/1PPS Outputs (Standard)
  • 2 AM Code Outputs (Standard)

RS-232 COM Port

  • Configurable 

GPS Receiver

  • 30ns RMS 15ns Compensated
  • Cold Start 26s, Hot Start 1s 

About

integrated Ethernet Switch (iES-6), is a rugged 6 port layer 2 managed gigabit Ethernet switch with end node timing and discrete signal capabilities for demanding test instrumentation environments on airborne, shipboard or mobile ground vehicles.

Programmable or data driven discrete outputs can be used to control end node devices on or off the network as well as feedback into the iES-6 from discrete inputs.

With multiple time sources and outputs the iES-6 provides end node device time signals. iES-6 contains a high time accuracy internal GPS receiver and a hardware based IEEE-1588v2 time engine both able to drive the internal IRIG-A/B/G Time Code Generator (TCG) for time outputs.

The integrated board stack architecture and front panel allow for user specifi c functions and connector interfaces to be implemented without compromising system architecture or integrity

  • (6) Tri-Speed Ports with Layer 2 Switch Management & Diagnostics
  • Internal GPS Receiver & IRIG-A/B/G Time Code Generator
  • IEEE-1588v2 Clocks: Master, Slave, Ordinary/Boundary or Transparent (P2P & E2E)
  • (8) Programmable Discrete Outputs & Reset Discrete Input
  • (3) IRIG DC/1PPS Outputs & (2) IRIG AM Outputs
  • Full Non-Blocking Wire Speed Performance for All Frame Sizes Up to 9.6KB
  • CLI, Web GUI or SNMP Command, Control & Monitoring